The present invention relates to the fabrication of semiconductor integrated circuits, and more particularly concerns methods and device structures for implementing large analog or analog/digital circuits in a format known as a master slice, master image, ASIC (application-specific integrated circuit), standard-cell array, semicustom or personalizable chip.
The integration of large-scale analog circuits has trailed considerably behind that of large-scale digital circuits. Automated methods and tools have been available for translating functional or schematic logic representations of a digital circuit into actual physical logic gates and their interconnection wiring on a semiconductor chip or die. Analog circuits, however, are still generally implemented by hand: determining the relative placement of physical devices or components, the routing of the wiring between the devices, wiring between devices and input/output (I/O) pads on the chip, wiring power busses and connecting them to the appropriate circuit devices. These tasks usually proceed iteratively; the design time and errors tend to grow exponentially with the size of the overall circuit.
The conventional methods which begin to improve on this situation mimic the methods developed for digital circuits. That is, preconstructed analog subcircuits are placed on a chip in the same way that multi-device logic gates are placed on a chip, then wired with automatic wiring programs.
There are several problems with these methods. Analog circuits cannot be characterized into a small number of primitive "logic gate" type circuits; a great variety of elementary circuits should be available for adequate flexibility in overall function. A single component at the logical or schematic level may require a personalized value or multiple devices. A single logical resistance, for example, may require part of a physical device or a number of physical resistor devices in order to implement the desired value of resistance. Furthermore, conventional analog master slice chip layouts do not have an organization that is compatible with existing placement and wiring techniques.